Boolean Logic
Advanced BDD Optimization
VLSI CAD has greatly benefited from the use of reduced ordered Binary Decision Diagrams (BDDs) and the clausal representation as a problem of "Boolean Satisfiability" (SAT), e.g. in logic synthesis, verification or design-for-testability.
Digital Circuit Analysis & Design
This text includes common number systems and conversions, operations in binary, octal, and hexadecimal systems, sign magnitude, floating point arithmetic, binary codes, Boolean algebra, minterms, maxterms, logic circuits, memory devices, CPLDs & FPGAs.